Process for producing silicon devices

ABSTRACT

Dielectrically isolated regions of single crystal silicon are produced through the use of a specific melting process. In this process, a substrate having regions of single crystal silicon contacting regions of non-single crystal silicon that overlie a dielectric material are treated. In particular, the entire region(s) of non-single crystal silicon is melted utilizing primarily radiant energy. Cooling is then initiated and the molten silicon is converted into a region of single crystal material. Isolation is completed by removing the appropriate regions of single crystal silicon.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to semiconductor devices and, in particular, todielectrically isolated semiconductors.

2. Art Background

In most electronic components, such as integrated circuits, electricalisolation is produced between regions of essentially single crystalsilicon by junction isolation. (Single crystal silicon is silicon havingdefects, e.g., linear and planar defects such as dislocations orstacking faults, respectively, in a density through the crystal of lessthan 10⁸ defects per cm⁺².) In this junction approach, lateral isolationis accomplished by interposing between the active single crystal siliconregions, a region of opposite electrical type from that of the activeregion. The thickness of this added region is approximately equal to thedepth of the active regions of the single crystal materials beingseparated. Similarly, vertical isolation in the junction approach isobtained by the presence of material of opposite conductivity typepositioned below the active region. (The active region is that portionof the single crystal silicon which is ultimately modified to containelectronic device structures. The active region is typically 1 μm thickfor nominal voltage devices.) Such rectifying junctions formed at theboundaries of the active regions of opposite type provide lateral andvertical isolation when appropriately biased. For some applicationslateral junction isolation is replaced with lateral dielectric isolationto save space and to reduce capacitance. (Lateral dielectric isolationentails the presence of an insulator rather than a material of oppositeconductivity type at the lateral boundaries of the active region.) Byexpedients such as junction isolation or lateral dielectric isolation,transistors or other devices formed in one single crystal region, i.e.,one active region, are electrically isolated and are prevented frominteracting with devices in a second active region.

However, for some significant applications the use of junctionisolation, or a combination of junction and lateral dielectricisolation, is not sufficient. For example, in some instances, thevoltage employed in operation is often large enough to cause electricalbreakdown between separate active regions. This electrical breakdownoccurs through many paths such as by the penetration of charge carriersbelow one active region through the underlying substrate, across thesubstrate under the lateral isolation region, and into the second activeregion. When a typical junction isolation structure is employed, thevoltages encountered in some applications, such as telephone lineinterface circuits, are sufficient to cause breakdown by charge carrierpenetration through the isolating regions. To prevent such undesirableelectrical interaction between two active regions, a combination oflateral and vertical dielectric isolation is employed. This dielectricisolation is provided by surrounding the single crystal silicon regionswith an electrically insulating dielectric material. By this expedient,interaction between active regions even at high voltages is avoided.

Vertical dielectric isolation is also advantageously used in devicesoperating at nominal voltages where enhanced reliability is desirable.The additional insulating material that provides the vertical dielectricisolation also prevents electron-hole pairs, formed in the underlyingsubstrate by thermal processes or by ionizing radiation, from migratingto an active region and, therefore, introducing errors in the processingof information by the electronic devices in this region. Additionaladvantages are also available by replacing junction isolation completelywith dielectric isolation. Typical junction isolation introducessignificant capacitance into the structure. It is possible in theory toincrease the insulating capability of junction isolation to preventbreakdown in high-voltage devices. However, a high-voltage applicationrequires a correspondingly high resistivity in the junction isolationregion. Since the size of the depletion region increases with bothvoltage and resistivity, enhanced breakdown characteristics require anextremely large volume devoted to isolation. This large volume imposes apenalty both in the required volume per device and in increasedparasitic capacitance. The substitution of dielectric isolation forjunction isolation greatly reduces the area requirement, therebyreducing cost and also reduces capacitance, allowing faster deviceoperation.

A variety of processes have been employed to produce semiconductorcomponents having dielectric isolation. The majority of these processeshave been directed to producing a thin, i.e., less than 3 microns,dielectrically isolated active region. In a number of these processesdirected to producing thin active regions, a precursor structure isfabricated by first forming patterned regions of dielectric material,e.g., silicon oxide, on a single crystal silicon substrate. Silicon isdeposited onto this structure which results in non-single crystalmaterial, e.g., amorphous or polycrystalline silicon, overlying thedielectric regions and contacting the substrate portions exposed betweenthese regions. The non-single crystal silicon is then treated to causegrowth of single crystal silicon at the non-single crystalsilicon/substrate interface and to propagate this single crystal throughthe non-single crystal silicon region. This propagation is done bymelting a discrete zone containing both the single crystalline andnon-single crystal material and then propagating this discrete zonethrough the non-single crystal region in a manner akin to a zonerefining process.

One method has been disclosed for producing a thick, i.e., 3 μm orthicker, dielectrically isolated active region. This process has beendescribed by K. E. Bean and W. R. Runyan, Journal of the ElectrochemicalSociety, 124, 50 (1977). The Bean process, possibly because of thedesire to produce thick, dielectrically isolated single crystal silicon,does not involve a melting procedure which propagates a nucleatedcrystal through the polycrystalline region by translating a discretemolten zone. Instead, an elaborate series of deposition and etchingsteps, as shown in FIG. 1, is utilized. Briefly, the steps involve thetreatment of a high-quality single crystal substrate. This siliconsubstrate, 1A in FIG. 1, is coated with an insulating material, such assilicon oxide, 3, and holes, 5, are formed in the oxide by conventionaltechniques, e.g., photolithography and oxide etching. Grooves, 7, arethen anisotropically etched in the exposed portions of the siliconunderlying the holes in the dielectric material. The masking oxide isremoved and the entire surface is epitaxially coated with an optionallayer of N⁺ silicon, 8. The N⁺ silicon is, in turn, coated with aninsulator, 9, such as silicon oxide. The insulator is once again, inturn, coated with a layer of polysilicon, 10. The structure produced isdenoted 1F in FIG. 1. The entire structure is then inverted and thesilicon substrate is ground off and polished until the structure shownat 1G is obtained. In this structure, the remaining high-quality siliconis denoted by 12 and 15, the insulating layer is indicated by 14, andpolysilicon is indicated by 16. Thus, the final structure has singlecrystal silicon, 12 and 15, on an electrically insulating material.

As can be appreciated from the previous description and from FIG. 1,dielectric isolation of thick silicon active regions involves amultitude of complicated processing steps. Additionally, the extensiveprocessing employed introduces high levels of defects into the singlecrystal active regions and results in low yields of useful devices.Thus, components involving thick, dielectrically isolated regions ofsilicon have only been used for applications which require production ofdevices where properties are critical and expense is a secondary factor.

SUMMARY OF THE INVENTION

Dielectrically isolated thick regions of single crystal silicon areproduced by a relatively uncomplicated procedure. A melting procedure isemployed resulting in good yields of relatively low-defectdielectrically isolated single crystal silicon. Further, the heatingprocess does not require melt source propagation across thenon-crystalline silicon region and thus results in more rapid productionof thick, dielectrically isolated active regions than is presentlyachievable even in the production of thin dielectrically isolated activeregions. In the inventive procedure, a precursor structure having singlecrystal silicon regions in intimate contact with thick non-singlecrystal silicon regions is utilized. The thick non-single crystalsilicon regions overlie a dielectric material such as a layer of siliconoxide. The precursor structure is typically capped with a layer ofmaterial that is sufficiently thick to confine the molten silicon duringsubsequent heating steps. For example, a capping layer of silicon oxideis employed. The precursor structure is heated utilizing a heat sourceproviding heat by predominantly, i.e., more than 50 percent, preferablymore than 80 percent, radiant transfer to entirely melt the regions ofnon-single crystalline silicon. (The capping layer prevents the ballingof the underlying molten silicon--preventing the agglomeration ofsilicon and thus preserving spatial uniformity). A temperature gradientis provided between the top and the bottom surface of the precursorstructure to ensure that the entire structure is not melted. The levelof radiant heat supplied to the precursor structure is then reduced sothat recrystallization of the molten zone occurs. The temperaturegradient that is present between the surface of the molten silicon andthe surface of the precursor structure farthest removed from the moltensilicon causes recrystallization to initiate at the singlecrystal/molten zone interface. Surprisingly, this thermal gradient issufficient to produce solidification into single crystal materialthroughout the formerly non-single crystal silicon region without thenecessity of affirmatively propagating a heat source across thenon-single crystal region. Isolation is completed by, for example,etching away the single crystal seeding, i.e., nucleating regions. Theprocess is reliable, is relatively rapid and is considerably simplerthan the procedure previously used for the production of thickdielectrically isolated single crystal silicon active regions. Moreover,the single crystal, dielectrically isolated regions produced by thismethod have greatly reduced defect densities compared with thoseproduced by conventional dielectric isolation processing.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1G are illustrative of a technique disclosed in the literaturefor producing thick dielectrically isolated silicon active regions; and

FIGS. 2 and 3 are illustrative of aspects involved in the inventivetechnique.

DETAILED DESCRIPTION

The inventive process is practiced on a precursor structure, such asshown in FIG. 2, which has region(s) of non-single crystal silicon,e.g., polycrystalline silicon or amorphous silicon, 4, that at least inpart overlie a region(s), 6, of dielectric material, e.g., siliconoxide, and that typically contacts a region or region(s), 8 or 9 ofsingle crystal silicon. The production of such precursor structures aredescribed in co-assigned U.S. application Ser. No. 231,238 (H. J. Leamy12) filed Feb. 4, 1981, which is hereby incorporated by reference and inco-assigned and co-pending application Ser. No. 374,308 filedsimultaneously with this application which is also hereby incorporatedby reference. Generally, the regions of dielectric material, e.g.,silicon oxide, have a thickness in the range 0.5 to 10 μm. Thinnerregions typically do not yield an advantageous level of dielectricisolation while thicker regions require a relatively long-growth periodand thus are uneconomical.

In a typical method for producing the desired precursor structure, thedielectric material is formed on a single crystal silicon substrate andpatterned to yield the desired region of dielectric material. Silicon isthen generally deposited onto the single crystal substrate with itsregions of dielectric material. The deposition is continued for theproduction of thick active regions until the non-single crystallinesilicon overlying the dielectric material has a thickness of at least 3microns. In this manner, structures such as shown in FIG. 2 areproduced, where 9 is a single crystalline substrate, where region(s) 4is a non-single crystalline region, and where region(s) 8 (delimited byimaginary dotted lines) is either a single crystalline or non-singlecrystal region. (If region 8 in FIG. 2 is non-crystalline, generally adepression above this region occurs at the surface of thenon-crystalline region, 4.) Additionally, depending on the method offabrication of the precursor structure, it is possible, as shown in FIG.3, that the single crystal region 8 has its exposed surface of extent,30, either above or below the surface of the non-single crystallineregion, 4. The relative spatial relationship of the surface of thesingle crystal silicon region to the surface of the non-single crystalsilicon region is not critical provided there is intimate contactbetween the two. For example, there is intimate contact between the tworegions at 10 as shown in FIG. 2, when region 8 is non-crystalline, at23 if region 8 is single crystalline or at 12 in FIG. 3 where region, 8,is single crystal silicon.

The regions of non-single crystalline silicon in the precursor structureare completely melted during processing. There is a tendency for thesemelted regions to ball. To prevent unacceptable balling, it is generallydesirable to cap the non-single crystal silicon with a layer of amaterial which does not adversely interact with the underlying silicon.(If a portion of single crystal material is also to be melted, it isalso desirable that this portion be capped). The capping layer is formedof a material which melts or significantly softens at a temperaturesignificantly higher, e.g., 300 degrees C. higher, than the meltingpoint of silicon. (The melting of the capping layer is not precluded,however, provided it still confines the underlying silicon and does notmix or chemically interact with it.) When the underlying non-singlecrystal silicon is melted, the capping layer remains continuous over themolten mass, confines it, and prevents balling. Typically, a cappinglayer thickness in the range 0.1 to 5 μm is desirable. Generally,thicker layers are not acceptable since they take an excessive time toform while thinner layers are typically too weak to sustain the stressproduced by the thermal treatment. The material employed for the cappingregion should not adversely interact with the underlying regions ofsilicon, e.g., there should not be an unacceptable chemical reactionbetween the silicon and the capping material. There also should not besufficiently large stress between materials to produce significantcracking of the capping layer or other physical degradation upon thermalprocessing. For example, the use of a bilayer capping material with abottom layer of silicon oxide and an upper layer of silicon nitride,although not precluded, has shown a tendency to crack and shouldgenerally not be used unless cracking is prevented.

Generally, a capping body such as a single layer of silicon oxide isquite acceptable for capping the non-single crystal silicon regions. Thecapping body as discussed serves one primary purpose, i.e., to preventballing of the underlying molten silicon. However, if the molten siliconlayer is quite thick, such unacceptable balling is prevented due to theconfinement provided by the viscosity of the silicon material. Thus, thecapping layer is not an essential element of the invention but merely anexpedient to allow suitable melting under certain conditions.

Once the precursor structure is formed (together with a capping bodywhen desired), the non-single crystal region(s) of silicon are melted bysupplying predominately radiant rather than convective or conductiveheat. For example, black-body radiation is employed to heat theprecursor structure. It is desirable that the radiation be absorbedprimarily near the surface of the precursor structure, i.e., in and nearthe capping material (if present) and non-single crystal material.Because of the properties of silicon, this requisite is inherentlysatisfied for typical sources of radiant energy. In particular, assilicon gets hotter its absorption coefficient for radiation in therange 0.5 to 30 μm becomes significantly larger. (Below 0.5 μm theabsorption coefficient of silicon is very high irrespective oftemperature.) Thus, as the precursor body is heated most of the incidentradiation is absorbed within a short distance of the non-single crystalsilicon surface. The use of a capping layer which strongly absorbs theradiant energy, although not essential, also contributes to limiting thedepth of penetration of the radiation. Thus, for example, it is possibleto employ a capping layer that strongly absorbs the incident radiantenergy and causes melting of the underlying non-single crystal siliconmaterial by conduction. (The requirement that heating be accomplishedprimarily by radiant heating relates to the heating of the precursorstructure. The means of heat transfer within the precursor structureincluding a capping layer (if present) to produce melting of thenon-single crystal silicon regions is not critical.)

Heating is continued until all of the polycrystalline silicon regionsthat are to be converted to single crystal silicon regions have beencompletely melted. Although it is not essential that any portion of anyregion of single crystal silicon be melted, such melting is notprecluded. In this regard, generally the entire substrate upon which theprecursor structure is built is a single crystal silicon material. Theregions of single crystal silicon in contact with the non-single crystalsilicon regions are typically an extension of this substrate. Thus,provided the entire substrate is not melted, which obviously should beavoided, there will be areas of single crystal silicon in contact withthe melted regions of silicon. As a result, the extent of melting beyondthat required to melt the regions of non-single crystal silicon is notcritical. (It is possible that during fabrication an extremely thinlayer of silicon oxide is inadvertently grown and is interposed betweenthe single crystal silicon region and the non-single crystal siliconregion. This layer presents no problem since it dissolves in moltensilicon. Thus, it is removed when the molten silicon contacts it.However, to ensure complete removal, it is desirable that at least asmall amount of single crystal silicon adjoining it also be melted.)

It is, however, generally desirable to limit heating after the meltingof the non-single crystal regions so that deformations across adielectric region are not greater than 20 percent of the averagethickness of the final isolated single crystal region. Generally, forcapping materials such as silicon oxide the use of a resistively heatedsource of radiation such as tungsten halogen lamp, or an arc lampproviding an intensity at the capping region in the range of 60 to 100W/cm⁺² is appropriate. Typically, such a source will melt a 5 to 20 μmthick non-single crystal silicon region underlying a 0.5 to 3 μm thickSiO₂ capping region in 1 to 100 seconds. Continued heating after thismelting has been accomplished, as discussed above, is not precluded andin fact advantageous results are obtained even when melting continues toa level of 0 to 20 μm below the surface of the dielectric regions.

After the desired degree of melting has been achieved, cooling isinitiated in a manner that ensures that the temperature of the topsurface, e.g., the capping layer, is greater than the temperature of thefurthest removed surface, i.e., the bottom surface, 21, in FIGS. 2 and3, to ensure a temperature gradient is established in direction 25. Thistemperature differential should be sustained until recrystallization issubstantially complete. This criterion is satisfied in a variety ofways. For example, the radiant heating is terminated slowly so that thesurface of the molten silicon also cools relatively slowly. For example,when a radiant light source is employed that is resistively heated,e.g., a tungsten halogen lamp, termination is accomplished by reducingthe current from the level used to melt the non-single crystal siliconregions to essentially no supplied current over a suitable period oftime. Typically, time periods of 60 seconds produce advantageousresults. However, significantly shorter time periods such as 10 secondsand as low as 2 seconds are also quite useful.

Additionally, to ensure the appropriate temperature gradient duringmelting and recrystallization, it is desirable that a non-reflectingmeans be provided so that radiation from the heat source or from thebottom of the wafer is not reflected to the single crystalline substratesurface, 21, in FIGS. 2 and 3 during heating. For example, an absorbingbody, such as a black aluminum plate or a transmissive body, such as aquartz sheet is placed under the substrate. The non-reflecting meansshould be sufficiently larger than the precursor structure that lightincident below the substrate is not reflected onto it. It is alsodesirable that the means used to prevent reflection does not itselfradiate a substantial amount of energy. For example, it is appropriateto cool, e.g., water-cool, an absorbing non-reflective means so thatabsorbed energy is not substantially reradiated. Assuming thatreflection is substantially avoided, the ambient surrounding thesubstrate is not critical.

Although an air, inert gas, or vacuum ambient is perfectly acceptable,certain advantages are attainable utilizing an oxygen ambient. Inparticular, when a silicon oxide capping layer is employed the oxygentends to heal any cracks in this material. Additionally, any siliconsublimed from other surfaces is passivated by a silicon oxide layerformed through reaction with the oxygen. Isolation is completed byremoving, for example by etching, the small region of single crystalmaterial between regions of silicon that overlie the dielectric. Devicesare formed in the single crystal active regions through well-knownconventional techniques.

Through the use of the inventive process non-single crystal siliconregions having lateral dimensions of up to 2 mm×1 mm are converted intosingle crystal regions overlying a dielectric material such as siliconoxide. Indeed, it appears that 2 mm×1 mm regions are by no means a limitto the useful size of dielectrically isolated single crystal siliconwhich is producible. The following example are illustrative of suitableconditions employed to achieve such results.

EXAMPLE 1

A polished silicon wafer 3 inches in diameter having its major surfacein the {100} plane was purchased from a commercial supplier. A cleaningsolution was prepared by mixing 12.24 kg of concentrated sulfuric acidwith 1000 ml of 30 percent hydrogen peroxide. The solution was heated to100 degrees C. and the wafer was immersed for approximately 10 minutes.The wafer was transferred to a deionized water bath that was heated to70 degrees C. The water in the bath was exchanged three times and thenthe wafer was dried by spinning. The wafer was introduced into a furnaceheated to 1150 degrees C. The atmosphere of the furnace was produced bybubbling oxygen through a water bubbler heated to 98 degrees C. andintroducing the oxygen which was thus saturated with water vapor intothe furnace. The treatment of the wafer with oxygen was continued for6.5 hours to produce a 2 micron thick silicon oxide layer. A 1 micronthick layer of AZ 111 positive resist (a proprietary product of ShipleyCompany) was spun onto the silicon oxide layer. The resist was exposedwith a mercury lamp through a mask which contacted the resist surface.The mask pattern consisted of a series of opaque rectangles of varyingsizes which were separated by approximately 50 micron-wide spaces. Theresist was then developed in a commercial resist developer. The exposedoxide regions were then etched away by immersing the wafer in a bufferedaqueous solution of HF for 30 minutes. The resist was then removed byutilizing a commercial resist stripper, and the wafer was again cleanedutilizing the previously described hydrogen peroxide/sulfuric acidtreatment with the associated rinse and drying steps.

The wafer was transferred to the sample holder of an AMV-1200 CVDreactor (sold by Applied Materials, Inc.). The wafer was positioned sothat the silicon oxide surface was exposed. The system was purged withdry nitrogen and then with dry hydrogen. The wafers were heated to 1150degrees C. in dry hydrogen. The hydrogen flow was adjusted to give aflow rate of 95 liters per minute. A flow of 4 g per minute of silicontetrachloride was introduced into the reactor for 1 minute. The use ofthis 1 minute treatment resulted in the deposition between therectangular silicon oxide regions of 1.4 microns of epitaxial silicononto the exposed regions of single crystal silicon. After the silicontetrachloride was terminated, the substrate temperature was reduced to1050 degrees C. and a silane flow of 150 sccm for 46 minutes wasintroduced. After the 46 minute flow, the introduction of silane wasterminated. This procecure resulted in approximately 15 microns ofpolycrystalline silicon overlying the silicon oxide rectangles and anapproximately equal thickness of epitaxial silicon overlying thepreviously deposited epitaxial silicon. The deposition chamber waspurged with dry hydrogen for 1 minute, the heating was terminated, andthe wafer was allowed to cool in the dry halogen atmosphere.

The surface of the polycrystalline material was cleaned, rinsed anddried by the previously described procedure. A silicon dioxide cappinglayer was deposited by the low-pressure chemical vapor depositionprocess described in R. S. Rosler, Solid State Technology, pp. 63-70,April 1977. In this procedure the substrate was heated to approximately430 degrees C. The total pressure of silane and oxygen introduced intothe apparatus was approximately 0.5 Torr. The flow rates of silane,oxygen and nitrogen were, respectively, 60 sccm, 520 sccm and 1500 sccm.The deposition of this silicon dioxide capping layer continued forapproximately 182 minutes to produce a layer thickness of approximately2 microns.

The wafer was then transferred to the sample holder of a radiant heatfurnace. This furnace consisted of two chambers separated from eachother and sealed off by quartz plates. Each wafer was positioned onthree quartz pins in the lower chamber, about 0.5 inches above awater-cooled blackened aluminum oven floor. The upper chamber containeda bank of tungsten-halogen lamps suspended below a gold platedreflector. Both chambers had lateral dimensions of 10×12.5 inches. Toavoid lamp overheating and early failure, air is forced through thefully enclosed upper chamber, which is essentially a wind tunnel with aquartz lower wall. Three phase-angle fired power supplies controlled bya microprocessor provide in excess of 100 kW to the lamps, which issufficient to melt silicon. After the wafer was inserted with thecapping layer facing the lamps the furnace was closed, the air coolingof the lamps begun and the water cooling of the oven floor initiated. Anoxygen flow was introduced into the sample chamber of the furnace toprovide an atmosphere of oxygen around the wafer. The power to the lampswas linearly increased over a period of 10 seconds from 0 to 112 kW. Theuse of 112 kW of electrical power provided 78 W/cm² of radiant energy atthe capping surface of the precursor structure. The 112 kW power levelwas continued for 20 seconds. The lamp current was then linearlydecreased to zero over a time period of 60 seconds. By this procedurethe polycrystalline material overlying the silicon dioxide dielectricwas entirely converted to single crystal silicon. The silicon dioxidecapping layer was removed by immersing the wafer in a buffered HFaqueous solution for approximately 30 minutes.

What is claimed is:
 1. A process for producing an active region ofsingle crystal silicon overlying a region of dielectric materialcomprising the steps of:(1) forming a precursor structure that includesa region of non-single crystal silicon material which both overlies saidregion of dielectric material and which is in proximity to a nucleatingregion of single crystal silicon and (2) converting said non-singlecrystal silicon region into said active region of single crystal siliconby employing said nucleating region of single crystal silicon as anucleating site characterized in that said conversion is accomplished byentirely melting at least said region of non-single crystal silicon withheat at least 50 percent of which is provided from a radiant source toform a molten silicon region which contacts said nucleating region andallowing said molten silicon region to recrystallize while maintainingthe surface of said molten region at a higher temperature than thetemperature of the surface of said precursor structure furthestvertically removed from said surface of said molten region.
 2. Theprocess of claim 1 wherein said radiant source comprises a resistivelyheated lamp.
 3. The process of claim 2 wherein said resistively heatedlamp comprises a tungsten halogen lamp.
 4. The process of claim 1wherein said radiant source comprises an arc lamp.
 5. The process ofclaim 1 wherein said region of dielectric material comprises siliconoxide.
 6. The process of claim 1 wherein a capping layer overlies saidregion of non-single crystal silicon.
 7. The process of claim 5 whereinsaid capping region comprises silicon oxide.
 8. The process of claim 1wherein a means is provided to substantially prevent energy from beingreflected onto said furthest removed surface of said precursor body. 9.The process of claim 8 wherein said means comprises a blackened aluminumplate.